1. Field of the Invention
The invention relates to a multi-processor system and, more particularly, to a performance adjustment method of the multi-processor system.
2. Description of the Related Art
Please refer to FIG. 1, which shows a schematic diagram of a conventional multiprocessor system. The multi-processor system 100 is provided normally on a motherboard of a computer system. The multi-processor system usually includes two or more Central Process Units (CPUs), such as a first processing unit and a second processing unit, and a first Voltage Regulator Module (VRM) VR1 and a second VRM VR2 which supply power corresponding to the processing units 110 and 120.
The state-of-the-art VRM can adjust the output voltage according to the core voltage level of the processing unit. For example, the first VRM VR1 produces a corresponding voltage Vcore1 to the first processing unit 110 according to a dynamic Voltage Identification Code (VID) provided by the first processing unit 110. Therefore, the first processing unit 110 can obtain the appropriate power supply from the first VRM VR1 under different CPU usage, so that the process efficiency is increased and the unnecessary waste of the power is avoided. Similarly, the second VRM VR2 supplies the power to the second processing unit 120 independently.
Moreover, a processor working in a plurality of work mode is also developed, which can switch among the C0-Active mode, C1-Halt mode, C2-Stop Clock mode, C3-Deep Sleep mode, C4-Deeper Sleep mode for automatically changing the core clock and the operation voltage of the processor according to the system load. Moreover, many desktops and laptop computers employ the Enhanced Intel Speed-Step Technology (EIST) to improve the system from the problems of high temperature and high power consumption. Some other efficiency-adjusting technologies of the CPU such as the CPU throttling are also developed.
It is well known that there are few corresponding supporting software programs under the current hardware level of the dual CPU or multi-core processor. For example, the game developer still writes the game program with a single thread due to the difficulty of the program development. This results in that the multi-processor system 100 only use one processing unit (such as the first processing unit 110) to execute the computer game program and let the second processing unit 120 to be idle. Sometimes since no optimization is considered for multi-processor system during programming and compiling, even the processing unit 110, 120 is distributed with balanced operation data, the data are still relevant and not independent completely. Under this situation, the second processing unit 120 may need to wait for the data from the first processing unit 110 to begin its operation. That is, the processing units 110, 120 can not give play their full operation ability at the same time. Although the processing units 110 and 120 provides double operation capability of single processor in theory, the increasing of the system efficiency is still limited when the operation bottleneck occurs, and the expected advantages are shielded.